Role: Analog Mixed-Signal (AMS) CAD Engineer
Location: San Francisco, CA
Interview: Phone/skype
Job Type: Contract
The Integrated Circuit (IC) CAD Engineer - Analog Mixed-Signal Flow Automation role at involves supporting IC design teams in various capacities, including PDK administration, layout design support, verification flow support, and scripting development
Responsibilities
The Integrated Circuit (IC) CAD Engineer - Analog Mixed-Signal Flow Automation role at involves supporting IC design teams in various capacities, including PDK administration, layout design support, verification flow support, and scripting development
Administer CAD EDA environment for analog, digital, photonics, and package design teams
Support design flows from EDA vendors like Cadence, Synopsys, Mentor, Keysight, Ansys, and others
Write scripts to support design teams and flows using Python
Oversee physical verification tools and decks (DRC, LVS, Extraction, EM/IR, ESD, etc.), making custom modifications as needed
Develop and maintain infrastructure for custom PDK development (custom pcells, models, DRC, LVS, etc.)
Install and track foundry PDKs, including creating automated regression testing
Assist the infrastructure team in ensuring the availability and performance of computing resources
Bachelor's or master’s degree with 8+ years of CAD engineering experience
Experience in scripting languages such as Python
Proficient in using industry-standard design software, including Cadence Virtuoso, Cadence/Calibre DRC, LVS tools
Experience supporting design teams working with analog and digital design flows
Excellent communication skills and ability to work with remote teams
Proficiency with supporting DRC and/or LVS decks
Eligibility Criteria:
✔️ Genuine H1B candidates with verifiable I-94 travel history (C2C acceptable).
✔️ Green Card & US Citizens will be considered only on W2 payment terms.
If you or someone you know is a strong match, let’s connect immediately!
All your information will be kept confidential according to EEO guidelines.
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